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        <title>Vancouver Hack Space - wiki:hacks:fpga</title>
        <description>1601 Venables St, Vancouver</description>
        <link>https://vanhack.ca/</link>
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       <dc:date>2026-04-15T01:35:21+00:00</dc:date>
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        <title>Vancouver Hack Space</title>
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        <url>https://vanhack.ca/_media/wiki/logo.svg</url>
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    <item rdf:about="https://vanhack.ca/wiki/hacks/fpga/altera_10?rev=1493357956&amp;do=diff">
        <dc:format>text/html</dc:format>
        <dc:date>2017-04-28T05:39:16+00:00</dc:date>
        <dc:creator>Anonymous (anonymous@undisclosed.example.com)</dc:creator>
        <title>altera_10</title>
        <link>https://vanhack.ca/wiki/hacks/fpga/altera_10?rev=1493357956&amp;do=diff</link>
        <description>Arrow DECA Altera’s MAX 10

Linux Quartus is NOT multi-core. You MUST use windows Quartus!!!!!!!!!!!
Windows Quartus is about 10,000 times faster than Linux Quartus. There seems to be bugs in the Linux Quartus graphical engine as well.

	*  Arrow DECA
	*  &lt;http://www.alterawiki.com/uploads/7/7a/DECA_User_manual_rev1.pdf&gt;
	*</description>
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        <dc:format>text/html</dc:format>
        <dc:date>2017-03-14T22:54:18+00:00</dc:date>
        <dc:creator>Anonymous (anonymous@undisclosed.example.com)</dc:creator>
        <title>matlabzedboard</title>
        <link>https://vanhack.ca/wiki/hacks/fpga/matlabzedboard?rev=1489532058&amp;do=diff</link>
        <description>Matlab Videos

&lt;https://www.mathworks.com/videos/run-a-simulink-model-on-zynq-introduction-and-requirements-1-of-4-89508.html&gt;

&lt;https://www.mathworks.com/videos/run-a-simulink-model-on-zynq-zedboard-set-up-2-of-4-89509.html&gt;

&lt;https://www.mathworks.com/videos/run-a-simulink-model-on-zynq-exploring-the-simulink-model-3-of-4-89510.html&gt;

&lt;https://www.mathworks.com/videos/run-a-simulink-model-on-zynq-code-generation-and-deployment-4-of-4-89511.html&gt;</description>
    </item>
    <item rdf:about="https://vanhack.ca/wiki/hacks/fpga/opencsi?rev=1490991461&amp;do=diff">
        <dc:format>text/html</dc:format>
        <dc:date>2017-03-31T20:17:41+00:00</dc:date>
        <dc:creator>Anonymous (anonymous@undisclosed.example.com)</dc:creator>
        <title>opencsi</title>
        <link>https://vanhack.ca/wiki/hacks/fpga/opencsi?rev=1490991461&amp;do=diff</link>
        <description>&lt;https://www.parallella.org/2015/07/31/parallella-gets-a-camera/&gt;

Also, do note that USB on the Parallella is (or at least used to be) somewhat flaky. For some people, it worked flawless, while others never got a stable link.

Sylvain’s open source code showing how to use the solution can be found in &lt;https://github.com/parallella/parallella-examples/tree/master/rpi-camera&gt;

&lt;https://github.com/daveshah1/CSI2Rx&gt;

&lt;https://github.com/smunaut/axi-csi-rx&gt;

Start</description>
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        <dc:format>text/html</dc:format>
        <dc:date>2017-03-27T18:23:33+00:00</dc:date>
        <dc:creator>Anonymous (anonymous@undisclosed.example.com)</dc:creator>
        <title>openfpgaip</title>
        <link>https://vanhack.ca/wiki/hacks/fpga/openfpgaip?rev=1490639013&amp;do=diff</link>
        <description>*  LogicBricks
	*  Zynq LogicBricks
	*</description>
    </item>
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        <dc:format>text/html</dc:format>
        <dc:date>2017-05-17T22:44:18+00:00</dc:date>
        <dc:creator>Anonymous (anonymous@undisclosed.example.com)</dc:creator>
        <title>parallelagdb</title>
        <link>https://vanhack.ca/wiki/hacks/fpga/parallelagdb?rev=1495061058&amp;do=diff</link>
        <description>GDB example on Epiphany

	*  log into epiphany
		*  if you don&#039;t know the ip or name
		*  ifconfig -a #note the ip base address such as 172.16.4.182
		*  nmap -p 22 172.16.4.0/24
		*  find the (Adapteva) device

	*   ssh parallella@172.16.4.68
		*  passwd = parallella</description>
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        <dc:date>2017-05-17T22:30:51+00:00</dc:date>
        <dc:creator>Anonymous (anonymous@undisclosed.example.com)</dc:creator>
        <title>parallelagdbsdk</title>
        <link>https://vanhack.ca/wiki/hacks/fpga/parallelagdbsdk?rev=1495060251&amp;do=diff</link>
        <description>Epiphany gdb tutorial

	*  add to the end of ~/.bashrc


#FPGA environment
export QSYS_ROOTDIR=&quot;/home/tdwebste/intelFPGA_lite/16.1/quartus/sopc_builder/bin&quot;
source ~/.setup_epiphany_rc
source ~/setenv.sh
 

	*  cat ~/setenv.sh


export XILINX_VER=2016.4
#export XILINX_VER=2015.1
#export XILINX_VER=2014.3.1
source /opt/Xilinx/Vivado/${XILINX_VER}/settings64.sh
export PATH=$PATH:/opt/Xilinx/Vivado/${XILINX_VER}/bin</description>
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        <dc:format>text/html</dc:format>
        <dc:date>2017-03-28T07:01:44+00:00</dc:date>
        <dc:creator>Anonymous (anonymous@undisclosed.example.com)</dc:creator>
        <title>parallellaopencl</title>
        <link>https://vanhack.ca/wiki/hacks/fpga/parallellaopencl?rev=1490684504&amp;do=diff</link>
        <description>Hi Tim,
Following are my notes from the Saturday (March 25th, 2017) class:

Thanks,
Rahul

Install COPRTHR SDK
PARALLELLA PAGE:
https://www.parallella.org/2013/03/08/introduction-to-parallella-and-opencl/ 
http://www.browndeertechnology.com/coprthr_download.htm
GITHUB PAGE:
https://github.com/browndeer/coprthr (Procedure Explained)

sudo apt-get install gmake

apt-get install freebsd-glue

sudo aptitude 
install bison

sudo apt-get install flex

gitclone libelf
Installation is straightforward - …</description>
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        <dc:format>text/html</dc:format>
        <dc:date>2017-03-29T14:17:46+00:00</dc:date>
        <dc:creator>Anonymous (anonymous@undisclosed.example.com)</dc:creator>
        <title>pynq-z1</title>
        <link>https://vanhack.ca/wiki/hacks/fpga/pynq-z1?rev=1490797066&amp;do=diff</link>
        <description>PYNQ-Z1

	*  &lt;http://www.pynq.io/home.html&gt;
	*  &lt;https://github.com/Xilinx/PYNQ&gt;</description>
    </item>
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        <dc:format>text/html</dc:format>
        <dc:date>2017-05-16T17:26:38+00:00</dc:date>
        <dc:creator>Anonymous (anonymous@undisclosed.example.com)</dc:creator>
        <title>startingparallela</title>
        <link>https://vanhack.ca/wiki/hacks/fpga/startingparallela?rev=1494955598&amp;do=diff</link>
        <description>Attach heat sink with thermal adhesive.
I am using Artic Alumina.
The 2 sided thermal tape did not work for me.

&lt;http://www.parallella.org/docs/parallella_manual.pdf&gt;

	*  Please look at the board layout on page 10.
	*  The quick start guide is also here starting at page 13.

&lt;https://www.parallella.org/quick-start/&gt;

	*  5V DC power supply with 5.5mm OD / 2.1mm ID center positive polarity plug.</description>
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        <dc:format>text/html</dc:format>
        <dc:date>2017-03-31T20:17:54+00:00</dc:date>
        <dc:creator>Anonymous (anonymous@undisclosed.example.com)</dc:creator>
        <title>xilinx2015.1bugs</title>
        <link>https://vanhack.ca/wiki/hacks/fpga/xilinx2015.1bugs?rev=1490991474&amp;do=diff</link>
        <description>* Download the Vivado Web Pack

	*  run this script, but it has bug in the configure script.
		*  bash Xilinx_Vivado_SDK_2015.1_0428_1_Lin64.bin --confirm
		*  If you see this error 

ERROR: This installation is not supported on 32 bit platforms.
The program &#039;./xsetup&#039; returned an error code (1)</description>
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        <dc:format>text/html</dc:format>
        <dc:date>2017-03-28T06:32:39+00:00</dc:date>
        <dc:creator>Anonymous (anonymous@undisclosed.example.com)</dc:creator>
        <title>z-turn</title>
        <link>https://vanhack.ca/wiki/hacks/fpga/z-turn?rev=1490682759&amp;do=diff</link>
        <description>Z-Turn

The Z-Turn IO Cape does not use the raspberry PI CSI ribbon cable interface.

Parallela porcupine uses SLW15S-1C7LF which is a 15pin 1.00mm pitch, 0.30mm - 0.33mm thinkness PCB connector. 

MY-CAM011B connects to the Z-Turn IO Cape through 30-pin FPC connector.</description>
    </item>
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        <dc:format>text/html</dc:format>
        <dc:date>2017-03-31T19:19:16+00:00</dc:date>
        <dc:creator>Anonymous (anonymous@undisclosed.example.com)</dc:creator>
        <title>zedboardjtag</title>
        <link>https://vanhack.ca/wiki/hacks/fpga/zedboardjtag?rev=1490987956&amp;do=diff</link>
        <description>Instructions to install Zedboard JTAG drivers in Linux

	*  &lt;http://svenand.blogdrive.com/archive/172.html&gt;
	*  &lt;http://svenand.blogdrive.com/Zynq/ConnectZedBoard2.jpg&gt;
	*  Plug in the Jtag USB beside the power connector and the UART USB on the otherside of the power connector. 
	*  JP7 - JP11 should be “down” connecting SIG to GND.
	*  Power on the Zedboard and you should see to USB devices connected.</description>
    </item>
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        <dc:format>text/html</dc:format>
        <dc:date>2017-03-31T17:20:59+00:00</dc:date>
        <dc:creator>Anonymous (anonymous@undisclosed.example.com)</dc:creator>
        <title>zedboardzybo</title>
        <link>https://vanhack.ca/wiki/hacks/fpga/zedboardzybo?rev=1490980859&amp;do=diff</link>
        <description>ZedBoard and Zybo

	*  Zedboard Jtag Drivers
	*  The Zync Book and Tutorial with Source Code
	*  ZedBoard Tutorials
	*  Does not use standard CSI-2 interface used on raspberry PI cameras MicroZed™ Embedded Vision Carrier Card</description>
    </item>
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