hacks:fpga:startingparallela

Parallella UART Connection
Parallella Example walk through with Yocto
Parallella Open Hardware Accelerator

Attach heat sink with thermal adhesive. I am using Artic Alumina. The 2 sided thermal tape did not work for me.

http://www.parallella.org/docs/parallella_manual.pdf

Please look at the board layout on page 10.
The quick start guide is also here starting at page 13.

https://www.parallella.org/quick-start/

5V DC power supply with 5.5mm OD / 2.1mm ID center positive polarity plug.
A micro HDMI to HDMI cable.
A USB male Micro-B to female Standard-A cable.
An ethernet cable
Micro SD Card

Parallella UART Connection

Parallella Example walk through with Yocto

https://github.com/peteasa/parallella/wiki/Getting-started
- I have tried the adapteva way, but built their own build environment which they don't have the resources to maintain. Once out of date, it is best avoided. It is an incredible amount of work to bring up to date.
- the submodule branches I am using
  - ```
  for dir in $(find . -type d -name '.git' | sed 's#\/\.git$##'); do (cd $dir; pwd; git branch); done
```
- ```
/home/tdwebste/src/yocto/parallella/parallella-yoctobuild/meta-parallella
* elink-redesign
  yoctobuild
/home/tdwebste/src/yocto/parallella/parallella-yoctobuild/meta-example
* elink-redesign
/home/tdwebste/src/yocto/parallella/parallella-yoctobuild/poky
* morty
  master
  master-next
/home/tdwebste/src/yocto/parallella/parallella-yoctobuild/meta-epiphany
* elink-redesign
  master
/home/tdwebste/src/yocto/parallella/parallella-yoctobuild/meta-exotic
* elink-redesign
  master
/home/tdwebste/src/yocto/parallella/parallella-yoctobuild
* elink-redesign
/home/tdwebste/src/yocto/parallella/examples
* elink-redesign
/home/tdwebste/src/yocto/parallella/parallella-fpga/oh
* master
/home/tdwebste/src/yocto/parallella/parallella-fpga/device-tree-xlnx
* (HEAD detached at xilinx-v2016.4)
  master
/home/tdwebste/src/yocto/parallella/parallella-fpga
* elink-redesign
/home/tdwebste/src/yocto/parallella
  elink-redesign
* parallella-elink-redesign
```
  - https://www.yoctoproject.org/downloads selected latest stable yocto
- building linux
  - cd parallella/parallella-yoctobuild/meta-example
  - source prepareexampleyoctobuild.sh
  - bitbake –help
  - bitbake hdmi-image-example #compile
  - bitbake -c listtasks hdmi-image-example #list tasks
    - tasks are are in the form do_task eg do_clean or do_cleanall
    - bitback -c cleanall hdmi-image-example # equivalent to make clean
    - unfortunately epiphany-elf-gcc is hard configured to use and old version of autoconf 2.64
      - choice one download ftp://ftp.gnu.org/gnu/autoconf/ autoconf 2.64
        
        wget http://ftp.gnu.org/gnu/autoconf/autoconf-2.64.tar.bz2
        
        configure
        
        make
        
        make -n install
        
        check to make sure you will not overwrite your main autoconf
        
        make install
        
        which -a autoconf
      - upgrade configure.ac to autoconf 2.69
      - I choose the install autoconf 2.64
      - config.log shows that conftest.c is missing from epiphany-elf/libgcc build
        
        conftest.c is generated

Parallella Open Hardware Accelerator

https://www.parallella.org/2016/01/21/creating-an-fpga-accelerator-in-15-minutes/
edit setenv.sh
- export PATH=$PATH:/opt/Xilinx/Vivado/2015.1/bin #2016.4 causes CRITICAL syntax errors.
. setenv.sh
./run.sh accelerator
apt-get install iverilog gtkwave
gtkwave waveform.vcd # view waveform

gvim src/accelerator/hdl/accelerator.v # “put code here”
cd src/accelerator/fpga
./build.sh |tee build.log # build bitstream
- check the log file for errors

Table of Contents

Parallella UART Connection

Parallella Example walk through with Yocto

Parallella Open Hardware Accelerator